ICS487-25 Datasheet - Renesas

QUAD PLL

ICS487-25 Features

* Packaged in 16-pin TSSOP (Pb-free)

* Replaces multiple crystals and oscillators

* Input crystal or clock frequency of 27 MHz

* Zero ppm frequency synthesis error

* Duty cycle of 45/55

* Operating voltage of 3.3 V

* Advanced, low power CMOS pr

ICS487-25 General Description

The ICS487-25 generates five high-quality, high-frequency clock outputs. It is designed to replace crystals and crystal oscillators in DTV applications. Using IDT’s patented Phase Locked Loop (PLL) techniques, the device runs from a lower frequency crystal or clock input. Because there is zero ppm f.

ICS487-25 Datasheet (318.89 KB)