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IDT71V546S Datasheet - Renesas

Synchronous SRAM

IDT71V546S Features

* 128K x 36 memory configuration, pipelined outputs

* Supports high performance system speed - 133 MHz (4.2 ns Clock-to-Data Access)

* ZBTTM Feature - No dead cycles between write and read cycles

* Internally synchronized registered outputs eliminate the need to control OE

* Sing

IDT71V546S General Description

The IDT71V546 is a 3.3V high-speed 4,718,592-bit (4.5 Megabit) synchronous SRAM organized as 128K x 36 bits. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turn-around. Address .

IDT71V546S Datasheet (415.18 KB)

Preview of IDT71V546S PDF

Datasheet Details

Part number:

IDT71V546S

Manufacturer:

Renesas ↗

File Size:

415.18 KB

Description:

Synchronous sram.

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IDT71V546S Synchronous SRAM Renesas

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