M6MGT321S4TP Datasheet - Renesas

M6MGT321S4TP CMOS SRAM

M6MGB/T321S4TP provides for Software Lock Release function. Usually, all memory blocks are locked and can not be programmed or erased, when F-WP# is low. Using Software Lock Release function, program or erase operation 32M-bit Flash memory is a 4,194,304 bytes / 2,097,152 words, can be executed. 3.3.

M6MGT321S4TP Features

* DINOR (Divided bit-line NOR) architecture for the memory cell. Access Time Flash 85ns (Max.) 4M-bit SRAM is a 524,288 bytes / 262,144 words SRAM 85ns (Max.) asynchronous SRAM fabricated by silicon-gate CMOS technology. Supply Voltage VCC=2.7 ~ 3.6V The M6MGB/T321S4TP is a Stacked micro Multi Chip Pa

M6MGT321S4TP_Renesas.pdf