SLG46535 - Programmable Mixed-signal Matrix

Renesas

SLG46535 Datasheet Preview — Preview of SLG46535 PDF

Datasheet Details

Part number	SLG46535
Manufacturer	Renesas ↗
File Size	2.38 MB
Description	Programmable Mixed-signal Matrix
Datasheet	SLG46535-Renesas.pdf

SLG46535 Product details

Description

2.1 Functional Pin Description Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name Function VDD Power Supply 1 GPI General Purpose Input GPIO General Purpose I/O GPIO General Purpose I/O or Analog Comparator 0 (+) GPIO General Purpose I/O with OE or Analog Comparator 0 (-) SCL/GPIO General Purpose I/O SCL or GPIOD (NMOS open drain only) SDA/GPIO General Purpose I/O SDA or GPIOD (NMOS open drain only) GPIO General Purpose I/O with OE or Analog Comparator 1 (+) GND Ground GPIO General Purpose I/O or

Features

Logic & Mixed Signal Circuits.
Highly Versatile Macrocells.
Read Back Protection (Read Lock).
1.8 V (±5%) to 5 V (±10%) VDD.
1.8 V (±5%) to 5 V (±10%) VDD2 (VDD2 ≤ VDD).
Operating Temperature Range: -40°C to 85°C.
RoHS Compliant / Halogen-Free.
14-pin STQFN: 2 x 2.2 x 0.55 mm, 0.4 mm pitch.

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Published: Jan 8, 2025 |