STP1030 Datasheet - SPARC

STP1030 High-Performance 64-Bit RISC Processor

SPARC Technology Business Preliminary STP1030 May 1995 DATA SHEET UltraSPARC-I High-Performance 64-Bit RISC Processor INTRODUCTION The STP1030, UltraSPARC-I, is a high-performance, highly-integrated superscalar processor implementing the SPARC V9 64-bit RISC architecture. The STP1030 is capable of sustaining the execution of up to four instructions per cycle even in the presence of conditional branches and cache misses. This sustained performance is supported by a decoupled Prefetch and Disp.

STP1030 Features

* SPARC V9 Architecture Compliant

* Binary Compatible with all SPARC Application code

* VISual (Multimedia Capable) Instruction Set

* Multi-Processing Support - Glueless 4-processor connection with minimum latency - Snooping or Directory Based Protocol Support

STP1030 Datasheet (634.95 KB)