M35080BN Datasheet - ST Microelectronics

M35080BN 8-Kbit Serial SPI Bus EEPROM

The M35080 device consists of 1024x8 bits of low power EEPROM, fabricated with STMicroelectronics’ proprietary High Endurance Double Polysilicon CMOS technology. The device is accessed by a simple SPI-compatible serial interface. The bus signals consist of a serial clock input (C), a serial data inp.

M35080 8 Kbit Serial SPI Bus EEPROM With Incremental Registers PRELIMINARY DATA s Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes) Single Supply Voltage: 4.5 V to 5.5 V 5 MHz Clock Rate (maximum) Sixteen 16-bit Incremental Registers BYTE and PAGE WRITE (up to 32 Bytes) (except for the Incremental Registers) Self-Timed Programming Cycle Hardware Protection of the Status Register Resizeable Read-Only EEPROM Area Enhanced ESD Protection 1 Million Erase/Write Cycles (minimum) 40 .

M35080BN Features

* of the memory device are summarized in Table 3. The hardware write protection, controlled by the W pin, restricts write access to the Status Register M35080 VSS S W Q 1 2 3 4 8 7 6 5 AI02144B VCC D C NC Note: 1. NC = Not Connected. The memory is organized in pages of 32 bytes. However, the first

M35080BN Datasheet (139.28 KB)