M54HC131 - 3 TO 8 LINE DECODER/LATCH
The M54/74HC131 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS technology.
It has the same high speed performance of LSTTL combined with true CMOS low power consumption.
This device is a DECODER/LATCH capable of selecting arbitrarily one of eight outputs by three bin
M54HC131 M74HC131 3 TO 8 LINE DECODER/LATCH .
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HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE | IOH | = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC(OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS131 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Pa
