M74HC195 Datasheet - ST Microelectronics

M74HC195 8 BIT PIPO SHIFT REGISTER

M54HC195 M74HC195 8 BIT PIPO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 13 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS195 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro.

M74HC195 Features

* parallel inputs, parallel outputs, J-K serial inputs, a SHIFT/LOAD control input, and a direct overriding CLEAR. This shift register can operate in two modes : Parallel Load ; Shift from QA towards QD. Parallel loading is accomplished by applying the four bits of data, and taking the SHIFT/LOAD cont

M74HC195 Datasheet (264.08 KB)