74HC148 Datasheet - STMicroelectronics

74HC148 8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Cascading circ.

M54HC148 M74HC148 8 TO 3 LINE PRIORITY ENCODER . . . . . . . . HIGH SPEED tPD = 15 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS148 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro .

74HC148 Datasheet (252.34 KB)