K4S280432D Datasheet - Samsung semiconductor

K4S280432D 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL

The K4S280432C is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock .

www.DataSheet4U.com K4S280432D CMOS SDRAM 128Mbit SDRAM 8M x 4Bit x 4 Banks Synchronous DRAM LVTTL Rev. 0.1 Sept. 2001 Samsung Electronics reserves the right to change products or specification without notice. Rev.0.1 Sept. 2001 K4S280432D CMOS SDRAM Revision History Revision 0.0 (Mar., 2001) Revision 0.1 (Sep., 2001) Redefined IDD1 & IDD4 in DC Characteristics Changed the Notes in Operating AC Parameter. < Before > 5. For 1H/1L, tRDL=1CLK and tDAL=1CLK+tRP is .

K4S280432D Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4 & 8 ) -. Burst type (Sequential & Interleave)

* All inputs are sampled a

K4S280432D Datasheet (102.74 KB)