K7D321874A Datasheet - Samsung semiconductor

K7D321874A 32Mb A-die DDR SRAM

The K7D323674A and K7D321874A are 37,748,736 bit Synchronous Pipeline Burst Mode SRAM devices. They are organized as 1,048,576 words by 36 bits for K7D323674A and 2,097,152 words by 18 bits for K7D321874A, fabricated using Samsung's advanced CMOS technology. Single differential HSTL level clock, K a.

K7D323674A K7D321874A www.DataSheet4U.com 1Mx36 & 2Mx18 SRAM 32Mb A-die DDR SRAM Specification 153FCBGA with Pb & Pb-Free (RoHS compliant) INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS I.

K7D321874A Features

* : 1.5V VDDQ -> 1.5~.1.8V VDDQ - In RECOMENDED DC OPERATING CONDITIONS : Max VDDQ : 1.6 -> 1.9 Change TRUTH TABLE : Remove Clock Stop Change DC CHARACTERISTICS - x36 IDD : IDD50 : 950 -> 1050, IDD45 : 850 -> 950, IDD40: 800 -> 860, IDD30: 750 -> 760 - x18 IDD: IDD50 : 850 -> 1000, IDD45 : 800 -> 900,

K7D321874A_Samsungsemiconductor.pdf