Description
K7J643682M K7J641882M www.DataSheet4U.com 2Mx36 & 4Mx18 DDR II SIO b2 SRAM 72Mb M-die DDRII SRAM Specification 165 FBGA with Pb & Pb-Free (RoHS comp.
Input Clock Input Clock for Output Data Output Echo Clock DLL Disable when low Address Inputs Data Inputs 1 NOTE
Q0-35
Data Outputs Read, Write Cont.
Features
* 1.8V+0.1V/-0.1V Power Supply.
* DLL circuitry for wide output data valid window and future freguency scaling.
* I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
* Separate independent read and write data ports
* HSTL I/O
Applications
* where Product failure couldresult in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice. -
