M470T3354CZx Datasheet - Samsung semiconductor

M470T3354CZx DDR2 Unbuffered SODIMM 200pin Unbuffered SODIMM

Pin Name CK0,CK1 CK0,CK1 CKE0,CKE1 RAS CAS WE S0,S1 A0~A9, A11~A13 A10/AP BA0,BA1 ODT0,ODT1 SCL Function Clock Inputs, positive line Clock Inputs, negative line Clock Enables Row Address Strobe Column Address Strobe Write Enable Chip Selects Address Inputs Address Input/Autoprecharge SDRAM Bank Addr.

256MB, 512MB, 1GB Unbuffered SODIMMs DDR2 SDRAM DDR2 Unbuffered SODIMM 200pin Unbuffered SODIMM based on 512Mb C-die 64bit Non-ECC INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS .

M470T3354CZx Features

* Performance range E7 (DDR2-800) Speed@CL3 Speed@CL4 Speed@CL5 CL-tRCD-tRP 400 533 800 5-5-5 E6 (DDR2-667) 400 533 667 5-5-5 D5 (DDR2-533) 400 533 533 4-4-4 CC (DDR2-400) 400 400 3-3-3 Unit Mbps Mbps Mbps CK

* JEDEC standard 1.8V ± 0.1V Power Supply

* VDDQ = 1.8V ± 0.1V

M470T3354CZx Datasheet (328.84 KB)