S3P7295 - The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Table 1-1.
S3C7295 Pin Descriptions Pin Name P0.0 P0.1 P0.2 P0.3 Pin Type I/O Description 4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
Individual pins are software configurable as input or output.
Individual pins are software configurable as opendrain or push-pull output.
Indiv
S3C7295/P7295 PRODUCT OVERVIEW 1 OVERVIEW PRODUCT OVERVIEW The S3C7295 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With an up-to-704-dot LCD direct drive capability, and flexible 8-bit timer/counter, the S3C7295 offers an excellent design solution for a mid-end LCD game.
Up to 8 pins of the 80-pin QFP package can be dedicated to I/O.
Six vectored interrupts provide fast response t
S3P7295 Features
* Memory
* 256 × 4-bit RAM (excluding LCD display RAM) 16,384 × 8-bit ROM Memory-Mapped I/O Structure
* Data memory bank 15 Power-Down Modes
* Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Sub system clock stop mode 8