M378T3354BG0-CC Datasheet - Samsung

M378T3354BG0-CC DDR2 Unbuffered SDRAM MODULE

Pin Name A0-A13 BA0, BA1 RAS CAS WE S0, S1 CKE0,CKE1 ODT0, ODT1 DQ0 - DQ63 CB0 - CB7 DQS0 - DQS8 DM(0-8) DQS0-DQS8 Description DDR2 SDRAM address bus DDR2 SDRAM bank select DDR2 SDRAM row address strobe DDR2 SDRAM column address strobe DDR2 SDRAM wirte enable DIMM Rank Select Lines DDR2 SDRAM clock.

256MB,512MB,1GB Unbuffered DIMMs DDR2 SDRAM DDR2 Unbuffered SDRAM MODULE 240pin Unbuffered Module based on 512Mb B-die 64/72-bit Non-ECC/ECC Revision 1.2 January 2005 Rev. 1.2 Jan. 2005 256MB,512MB,1GB Unbuffered DIMMs DDR2 Unbuffered DIMM Ordering Information Part Number Density Organization Component Composition Number of Rank 1 1 2 1 2 DDR2 SDRAM Height x64 Non ECC M378T3354BG(Z)0-CD5/CC M378T6553BG(Z)0-CD5/CC M378T2953BG(Z)0-CD5/CC M391T6553BG(Z)0-CD5/CC M391T2953BG(Z)0-CD5/CC 256MB 5.

M378T3354BG0-CC Features

* Performance range D5(DDR2-533) Speed@CL3 Speed@CL4 Speed@CL5 CL-tRCD-tRP 400 533 4-4-4 CC(DDR2-400) 400 400 3-3-3 Unit Mbps Mbps Mbps CK

* JEDEC standard 1.8V ± 0.1V Power Supply

* VDDQ = 1.8V ± 0.1V

* 200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin

M378T3354BG0-CC_Samsungsemiconductor.pdf