Description
Serial Clock (SCL) The SCL input is used to clock data into the device on the rising edge and to clock data out of the device on the falling edge.
Features
- Data EEPROM internally organized as 512 bytes and 32 pages × 16 bytes.
- Page protection mode, flexible page-by-page hardware write protection.
- Additional protection EEPROM of 32 bits, 1 bit per data page P-DIP-8-4.
- Protection setting for each data page by writing its protection bit.
- Protection management without switching WP pin.
- Low power CMOS.
- VCC = 2.7 to 5.5 V operation.
- Two wire serial interface bus, I2C-Bus compatible.
SLX24C04P_SiemensSemiconductorGroup.pdf