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SLX24C0816 - 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus

Description

Serial Clock (SCL) The SCL input is used to clock data into the device on the rising edge and to clock data out of the device on the falling edge.

Features

  • Data EEPROM internally organized as 128/256 bytes and 16/32 pages × 8 bytes.
  • Low power CMOS.
  • VCC = 2.7 to 5.5 V operation.
  • Two wire serial interface bus, I2C-Bus compatible.
  • Filtered inputs for noise suppression with Schmitt trigger.
  • Clock frequency up to 400 kHz.
  • High programming flexibility.
  • Internal programming voltage.
  • Self timed programming cycle including erase.
  • Byte-write and page-write programming,.

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Other Datasheets by Siemens Semiconductor Group
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  • SLX24C32 - 32 Kbit 4096 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus
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Full PDF Text Transcription

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Standard EEPROM ICs SLx 24C01/02 1/2 Kbit (128/256 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet 1998-07-27 SLx 24C01/02 Revision History: Previous Version: Current Version: 1998-07-27 06.97 Page Page Subjects (major changes since last revision) (in previous (in current Version) Version) 3 5 15 4, 5 5 11, 12 19 20 20 20 I2C Bus Purchase of Siemens I2C components conveys the license under the Philips I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. 3 5 15 4, 5 – 11, 12 19 20 20 20 Text was changed to “Typical programming time 5 ms for up to 8 bytes”. WP = VCC protects the upper half entire memory. Figure 11: second command byte is a CSR and not CSW.
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