54S200 Datasheet - Signetics

54S200 TTL 256 x 1 RAM

54S200 Features

* ORGANIZATION - 256 X 1

* ADDRESS ACCESS TIME: S54S200/201/301 - 70ns MAXI MUM N74S200/201/301 - 50 ns MAXIMUM

* WRITE CYCLE TIME: S54S200/201/301 - 60ns MAXIMUM N74S200/201/301 - 50ns MAXI MUM

* POWER DISSIPATION - 1.5mW/BIT TYPICAL

* INPUT LOADING: S54S200/

Datasheet Details

54S200

Signetics

194.58 KB

Ttl 256 x 1 ram.

📁 Related Datasheet

54S201 TTL 256 x 1 RAM (Signetics)

54S240 Buffers / Lind Drivers / Line Receivers (National Semiconductor)

54S241 Buffers / Lind Drivers / Line Receivers (National Semiconductor)

54S244 Buffers / Lind Drivers / Line Receivers (National Semiconductor)

54S257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS (Texas Instruments)

54S258 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS (Texas Instruments)

54S288 256-BIT TTL PROM (National Semiconductor)

54S04 HEX INVERTING GATES (National Semiconductor)

TAGS

54S200 54S200 TTL 256 RAM Signetics

54S200 Distributor