* PARAMETER CL = 4 tCK tRC tRAC Clock Cycle Time (min) Random Read/Write Cycle Time (min) Random Access Time (max) CL = 5 CL = 6 -30 4.0 ns 3.33 ns 3.0 ns 20.0 ns 20.0 ns 250 mA 60mA 10 mA TC59LM818DMB -33 4.5 ns 3.75 ns 3.33 ns 22.5 ns 22.5 ns 235 mA 55 mA 10 mA -40 5.0 ns 4.5 ns 4.0 ns 25 ns 25 ns 2
TC59LM818DMB Datasheet (894.57 KB)
TC59LM818DMB
Toshiba ↗ Semiconductor
894.57 KB
Network fcram.
( DataSheet : www.DataSheet4U.com )
TC59LM818DMB-30,-33,-40
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TM
4,194,304-WORDS ×.
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