* High speed: fmax = 170 MHz (typ.) at VCC = 5 V
* Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
* High noise immunity: VNIH = VNIL = 28% VCC (min)
* Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
TC74AC112P Datasheet (284.58 KB)
TC74AC112P
Toshiba ↗ Semiconductor
284.58 KB
Dual j-k flip-flop.
TC74AC112P/F
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74AC112P, TC74AC112F
Dual J-K Flip Flop with Preset and Clear
The TC74AC112.
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