TC518512FL-80LV Datasheet PDF - Toshiba SILICON GATE CMOS PSEUDO STATIC RAM Specs

TC518512FL-80LV - SILICON GATE CMOS PSEUDO STATIC RAM

This page provides the datasheet information for the TC518512FL-80LV, a member of the TC518512PL-70LV SILICON GATE CMOS PSEUDO STATIC RAM family.

Datasheet Summary

Description

The TC518512PL is a 4M bit high speed CMOS pseudo static RAM organized as 524,288 words by 8 bits.

The TC518512PL utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed ar}QJow power storage.

The TC518512PL-LVoperates from a single 3.0V - 5.

Features

a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. The TC518512PL is available in a 32-pin, 0.6 inch width plastic DIP, a small outline plastic flat package, and a thin small outline package (forward type, reverse type). Features.
Organization: 524,288 words x 8 bits.
Low voltage op.

Datasheet Details

Part number	TC518512FL-80LV
Manufacturer	Toshiba
File Size	384.03 KB
Description	SILICON GATE CMOS PSEUDO STATIC RAM
Datasheet	TC518512FL-80LV Datasheet
Additional preview pages of the TC518512FL-80LV datasheet.

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Full PDF Text Transcription

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TOSHIBA TC518512PL/FL/FIL!fRL70LV/80LV/I0LV SILICON GATE CMOS 524,288 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC518512PL is a 4M bit high speed CMOS pseudo static RAM organized as 524,288 words by 8 bits. The TC518512PL utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed ar}QJow power storage. The TC518512PL-LVoperates from a single 3.0V - 5.5V power supply. Refreshing is supported by a refresh (05'RFSH) input which enables two types of refreshing - auto refresh and self refresh. The TC518512PL features a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface.

Published: Feb 15, 2017 |