TC59SM816CFTL, TC59SM816CFT Datasheet - Toshiba

TC59SM816CFTL (TC59SM804CFT - TC59SM816CFT) SDRAM

TC59SM816CFT/CFTL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4 banks × 16 bits and TC59SM808CFT/CFTL is organized as 8,388,608 words × 4 banks × 8 bits and The TC59SM804CFT/CFTL is organized as 16,777,216 words × 4 banks × 4 bits. Fully synchronous operations a.

TC59SM816CFTL Features

* PARAMETER -70 tCK Clock Cycle Time (min) 7 ns 40 ns 5.4 ns 56 ns 80 mA 100 mA 3 mA TC59SM816/M808/M804 -75 7.5 ns 45 ns 5.4 ns 65 ns 75 mA 95 mA 3 mA -80 8 ns 48 ns 6 ns 68 ns 70 mA 90 mA 3 mA tRAS Active to Precharge Command Period (min) tAC tRC Access Time from CLK (max) Ref/Active to Ref/Active

TC59SM816CFT_Toshiba.pdf