TTS3816B4E Datasheet (TwinMOS) - 2M x 16Bit x 4 Banks synchronous DRAM

TTS3816B4E, 2M x 16Bit x 4 Banks synchronous DRAM

The TTS3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits, fabricated with M’tec high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cyc

TTS3816B4E Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four-banks operation

* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)

* All inputs are