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MT9043 - T1/E1 System Synchronizer

MT9043 Description

MT9043 T1/E1 System Synchronizer Data Sheet .
The MT9043 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1.

MT9043 Features

* Supports AT&T TR62411 and Bellcore GR-1244CORE, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 1.544MHz, 2.048MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C1

MT9043 Applications

* Synchronization and timing control for multitrunk T1,E1 and STS-3/OC3 systems ST-BUS clock and frame pulse sources OSCi OSCo TCLR LOCK VDD VSS Master Clock TCK TDI TMS TRST TDO PRI SEC IEEE 1149.1a TIE Corrector Circuit Virtual Reference DPLL Output Interface Circuit Refere

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Datasheet Details

Part number
MT9043
Manufacturer
Zarlink Semiconductor
File Size
453.05 KB
Datasheet
MT9043_ZarlinkSemiconductor.pdf
Description
T1/E1 System Synchronizer

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System Synchronizer Zarlink Semiconductor
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