MT9046 Datasheet - Zarlink Semiconductor

MT9046 T1/E1 System Synchronizer with Holdover

The MT9046 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The device has reference switching and frequency holdover capabilities to help maintain connectivity during te.

MT9046 Features

* Supports AT&T TR62411 and Bellcore GR-1244CORE, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 1.544 MHz, 2.048 MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8,

MT9046_ZarlinkSemiconductor.pdf