MT9045 Datasheet - Zarlink Semiconductor

MT9045 T1/E1/OC3 System Synchronizer

The MT9045 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/OC3 links. The MT9045 generates ST-BUS clock and framing signals that are phase locked to either .

MT9045 Features

* Supports AT&T TR62411 and Bellcore GR-1244CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces

* Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces

* Supports ITU-T G.812 Type IV clocks for 1,544 kbit/s interfaces and 2,048 kbit/s interfac

MT9045_ZarlinkSemiconductor.pdf