A3R56E40ABF Datasheet - Zentel

A3R56E40ABF 256Mb DDRII Synchronous DRAM

A3R56E40ABF 256Mb DDRII Synchronous DRAM 256Mb DDRII SDRAM Specification A3R56E40ABF Zentel Electronics Corp. Revision 1.2 Dec., 2012 A3R56E40ABF 256Mb DDRII Synchronous DRAM Specifications Density: 256M bits Organization ⎯ 4M words × 16 bits × 4 banks (A3R56E40ABF) Package ⎯ 84-ball FBGA(μBGA) (A3R56E40ABF) ⎯ Lead-free (RoHS compliant) Power supply: VDD, VDDQ = 1.8V ± 0.1V Data rate: 1066Mbps/800Mbps(max.) 1KB page size (A3R56E40A.

A3R56E40ABF Features

* Double-data-rate architecture; two data transfers per clock cycle

* The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture

* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re

A3R56E40ABF-Zentel.pdf