A3V56S30FTP Datasheet - Zentel

A3V56S30FTP 256M Single Data Rate Synchronous DRAM

A3V56S30FTP is organized as 4-bank x 8,388,608-word x 8-bit Synchronous DRAM with LVTTL interface and A3V56S40FTP is organized as 4-bank x 4,194,304-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK. A3V56S30FTP and A3V56S40FTP achieve very high speed data rates up to 16.

A3V56S30FTP Features

* - Single 3.3V ±0.3V power supply - Maximum clock frequency : - 6:166MHz/-7:143MHz/-75:133MHz - Fully synchronous operation referenced to clock rising edge - 4-bank operation controlled by BA0, BA1 (Bank Address) - /CAS latency- 2/3 (programmable) - Burst length- 1/2/4/8/FP (prog

A3V56S30FTP-Zentel.pdf