74ACT11138 - 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
Y0 5 17 G2B The ′ACT11138 circuit is designed to be used in high-performance memory-decoding or datarouting applications requiring very short NC 6 16 NC Y1 7 15 Y7 Y2 8 14 9 10 11 12 13 Y6 propagation delay times.
In high-performance Y3 GND NC Y4 Y5 memory systems, this decoder can be u
54ACT11138, 74ACT11138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCAS050A D3266, JANUARY 1989 REVISED APRIL 1993 Designed Specifically for High-Speed 54ACT11138 .
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J PACKAGE Memory Decoders and Data Transmission 74ACT11138 .
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D, N, OR PW PACKAGE Systems (TOP VIEW) Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations
