74ACT11112 Datasheet - Texas Instruments

DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP

74ACT11112 General Description

This device contains two independent J-K negative-edge-triggered flip-flops. A low level at the PRE or CLR input sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements are transferr.

74ACT11112 Datasheet (82.91 KB)

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74ACT11112

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Texas Instruments ↗

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82.91 KB

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Dual j-k negative-edge-triggered flip-flop.
74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 REVISED APRIL 1993 .

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74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP Texas Instruments

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