ADS6123 Datasheet PDF - Texas Instruments Analog-to-Digital Converters Specs

ADS6123 - Analog-to-Digital Converters

This page provides the datasheet information for the ADS6123, a member of the ADS6122 Analog-to-Digital Converters family.

Datasheet Summary

Description

ADS6125/ADS6124/ADS6123/ADS6122 (ADS612X) is a family of 12-bit A/D converters with sampling frequencies up to 125 MSPS.

It combines high performance and low power consumption in a compact 32 QFN package.

Features

1.
Maximum Sample Rate: 125 MSPS.
12-Bit Resolution with No Missing Codes.
3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off.
Parallel CMOS and Double Data Rate (DDR) LVDS Output Options.
Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Clock Amplitude Down to 400 mVPP.
Clock Duty Cycle Stabilizer.
Internal Reference with Support for External Reference.
No External Decoupling Required for Re.

Datasheet Details

Part number	ADS6123
Manufacturer	Texas Instruments
File Size	2.65 MB
Description	Analog-to-Digital Converters
Datasheet	ADS6123 Datasheet
Additional preview pages of the ADS6123 datasheet.

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Full PDF Text Transcription

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www.ti.com ADS6125, ADS6124 ADS6123, ADS6122 SLAS560A – OCTOBER 2007 – REVISED MARCH 2008 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS FEATURES 1 • Maximum Sample Rate: 125 MSPS • 12-Bit Resolution with No Missing Codes • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off • Parallel CMOS and Double Data Rate (DDR) LVDS Output Options • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Clock Amplitude Down to 400 mVPP • Clock Duty Cycle Stabilizer • Internal Reference with Support for External Reference • No External Decoupling Required for References • Programmable Output Clock Position and Drive Strength to Ease Data Capture • 3.3 V Analog and 1.8 V to 3.

Published: Mar 6, 2024 |