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CD74HC297 Digital Phase-Locked Loop

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Description

Data sheet acquired from Harris Semiconductor SCHS177B November 1997 - Revised May 2003 CD54HC297, CD74HC297, CD74HCT297 High-Speed CMOS Logic Digita.
Digital Design Avoids Analog Compensation Errors. Easily Cascadable for Higher Order Loops. Useful Frequency Range - K-Cl.

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Applications

* They contain all the necessary circuits, with the exception of the divide-by-N counter, to build first-order phase-locked-loops. Both EXCLUSIVE-OR (XORPD) and edge-controlled phase detectors (ECPD) are provided for maximum flexibility. The input signals for the EXCLUSIVE-OR phase detector must have

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