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CDCM9102 Low-Noise Two-Channel 100-MHz Clock Generator

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Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design CDCM9102 SCAS922A * FEBRUARY 2012 .
The CDCM9102 is a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express™.

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Features

* 1 Integrated Low-Noise Clock Generator Including PLL, VCO, and Loop Filter
* Two Low-Noise 100-MHz Clocks (LVPECL, LVDS, or pair of LVCMOS)
* Support for HCSL Signaling Levels (AC-Coupled)
* Typical Period Jitter: 21 ps pk-pk
* Typical Random Jitter: 510 fs R

Applications

* Reference Clock Generation for PCI Express Gen 1, Gen 2, and Gen 3

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