Part number:
CDCVF2509A
Manufacturer:
File Size:
403.57 KB
Description:
3.3-v phase-lock loop clock driver.
Datasheet Details
Part number:
CDCVF2509A
Manufacturer:
File Size:
403.57 KB
Description:
3.3-v phase-lock loop clock driver.
CDCVF2509A, 3.3-V PHASE-LOCK LOOP CLOCK DRIVER
The CDCVF2509A is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.
It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
It is specifically designed for use with synchronous DRAMs.
The CDCVF2509A opera
CDCVF2509A Features
* 1
* Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1
* Spread Spectrum Clock Compatible
* Operating Frequency 20 MHz to 175 MHz
* Static Phase Error Distribution at 66 MHz to 166 MHz Is ±125 ps
* Jitter (cyc - cyc) at 60 MHz to 17
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