Datasheet4U Logo Datasheet4U.com

CDCVF2509A 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

📥 Download Datasheet  Datasheet Preview Page 1

Description

CDCVF2509A www.ti.com SCAS765E * APRIL 2004 * REVISED FEBRUARY 2010 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE Check fo.
The CDCVF2509A is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.

📥 Download Datasheet

Preview of CDCVF2509A PDF
datasheet Preview Page 2 datasheet Preview Page 3

Features

* 1
* Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1
* Spread Spectrum Clock Compatible
* Operating Frequency 20 MHz to 175 MHz
* Static Phase Error Distribution at 66 MHz to 166 MHz Is ±125 ps
* Jitter (cyc - cyc) at 60 MHz to 17

Applications

* Distributes One Clock Input to One Bank of Five and One Bank of Four Outputs
* Separate Output Enable for Each Output Bank
* External Feedback (FBIN) Terminal Is Used to Synchronize the Outputs to the Clock Input
* 25-Ω On-Chip Series Damping Resistors
* No

CDCVF2509A Distributors

📁 Related Datasheet

📌 All Tags

Texas Instruments CDCVF2509A-like datasheet