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CDCVF2510A 3.3-V PHASE-LOCK LOOP CLOCK DRIVER

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Description

CDCVF2510A www.ti.com SCAS764C * MARCH 2004 * REVISED FEBRUARY 2009 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE .
The CDCVF2510A is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.

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Features

* 1
* Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1
* Spread Spectrum Clock Compatible
* Operating Frequency 20 MHz to 175 MHz
* Static Phase Error Distribution at 66 MHz to 166 MHz is ±125 ps
* Jitter (cyc
* cyc) at 66 MHz

Applications

* DRAM Applications
* PLL Based Clock Distributors

CDCVF2510A Distributors

📁 Related Datasheet

CDC-Z137 CDC1607F-E CDC1631F-E CDC3207G-C CDC3207G-C3 CDC3257G-C2

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CDCVF2510A 3.3-V PHASE-LOCK LOOP CLOCK DRIVER Texas Instruments
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