HC165MEP - 8-Bit Parallel-Load Shift Registers
ordering information The SN74HC165 is an 8-bit parallel-load shift register that, when clocked, shifts the data toward a serial (QH) output.
Parallel-in access to each stage is provided by eight individual direct data (A *H) inputs that are enabled by a low level at the shift/load (SH/LD) inp
SN74HC165ĆEP 8ĆBIT PARALLELĆLOAD SHIFT REGISTER D Controlled Baseline One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of Up To 55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D 2-V to 6-V VCC Operation D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 13 ns † Component qualification in accordance with JEDEC and
HC165MEP Features
* a clock-inhibit (CLK INH) function and a complementary serial (QH) output. Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transitio
