* 1
* 23 Cascaded PLLatinum™ PLL Architecture
* PLL1
* Redundant Reference Inputs
* Loss of Signal Detection
* Automatic and Manual Selection of Reference Clock Input
* PLL2
* Phase Detector Rate up to 100 MHz
* Input Frequency-Doubler
LMK04101 Datasheet (817.92 KB)
LMK04101
817.92 KB
Family clock jitter cleaner.
www.ti.com
LMK04100, LMK04101, LMK04102, LMK04110 LMK04111, LMK04131, LMK04133
SNAS516B
* APRIL 2011
* REVISED NOVEMBER 2012
LMK0410.
📁 Related Datasheet
LMK04100 Family Clock Jitter Cleaner (Texas Instruments)
LMK04102 Family Clock Jitter Cleaner (Texas Instruments)
LMK04110 Family Clock Jitter Cleaner (Texas Instruments)
LMK04111 Family Clock Jitter Cleaner (Texas Instruments)
LMK04131 Family Clock Jitter Cleaner (Texas Instruments)
LMK04133 Family Clock Jitter Cleaner (Texas Instruments)
LMK04000 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04000 Low-Noise Clock Jitter Cleaner (National Semiconductor)
LMK04001 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
LMK04002 Family Low-Noise Clock Jitter Cleaner (Texas Instruments)
