* 1 Ultralow RMS Jitter Performance
* 100-fs RMS Jitter (12 kHz to 20 MHz)
* 123-fs RMS Jitter (100 Hz to 20 MHz)
* Dual Loop PLLatinum™ PLL Architecture
* PLL1
* Integrated Low-Noise Crystal Oscillator Circuit
* Holdover Mode when Input Clocks
LMK04906
1.91 MB
Ultralow noise clock jitter cleaner/multiplier.
Product Folder Order Now Technical Documents Tools & Software Support & Community LMK04906 SNAS589F JUNE 2012 REVISED AUGUST .
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