Description
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community LP2998, LP2998-Q1 SNVS521K * DECEMBER 2007 *.
The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of DDR-SDRAM and DDR2 memory.
Features
* 1 AEC-Q100 Test Guidance with the following results (SO PowerPAD-8):
* Device HBM ESD Classification Level H1C
* Junction Temperature Range
* 40°C to 125°C
* 1.35 V Minimum VDDQ
* Source and Sink Current
* Low Output Voltage Offset
* No
Applications
* DDR1, DDR2, DDR3, and DDR3L Termination Voltage
* Automotive Infotainment
* FPGA
* Industrial/Medical PC
* SSTL-18, SSTL-2, and SSTL-3 Termination
