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SN74ALVCH162841 - 20-BIT BUS-INTERFACE D-TYPE LATCH

Description

This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation.

Features

  • Member of the Texas Instruments Widebus™ Family.
  • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process.
  • Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required.
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0).
  • Latch-Up Performance Exceeds 250 mA Per JESD 17.
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resis.

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Datasheet preview – SN74ALVCH162841

Datasheet Details

Part number SN74ALVCH162841
Manufacturer Texas Instruments
File Size 1.11 MB
Description 20-BIT BUS-INTERFACE D-TYPE LATCH
Datasheet download datasheet SN74ALVCH162841 Datasheet
Additional preview pages of the SN74ALVCH162841 datasheet.

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Full PDF Text Transcription

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www.ti.com SN74ALVCH162841 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCES088E – OCTOBER 1996 – REVISED SEPTEMBER 2004 FEATURES • Member of the Texas Instruments Widebus™ Family • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) • Latch-Up Performance Exceeds 250 mA Per JESD 17 • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages NOTE: For tape-and-reel order entry, the DGGR package is abbreviated to GR.
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