* independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable (CLKENAB or CLKENBA) inputs. It also provides parity-enable (SEL) and parity-select (ODD/EVEN) inputs and separate error-signal (ERRA or ERRB) outputs for checking parity. The direction of data flow is contr
SN74ALVCH16901 Datasheet (576.07 KB)
SN74ALVCH16901
576.07 KB
18-bit universal bus transceiver.
SN74ALVCH16901 18ĆBIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCES010F JULY 1995 REVISED SEPTEMBER 2004 D Membe.
📁 Related Datasheet
SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER (Texas Instruments)
SN74ALVCH16952 16-BIT REGISTERED TRANSCEIVER (Texas Instruments)
SN74ALVCH16973 8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH (Texas Instruments)
SN74ALVCH162244 16-BIT BUFFER/DRIVER (Texas Instruments)
SN74ALVCH162260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH (Texas Instruments)
SN74ALVCH162268 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER (Texas Instruments)
SN74ALVCH162334 16-BIT UNIVERSAL BUS DRIVER (Texas Instruments)
SN74ALVCH162344 1-BIT TO 4-BIT ADDRESS DRIVER (Texas Instruments)
SN74ALVCH162373 16-BIT TRANSPARENT D-TYPE LATCH (Texas Instruments)
SN74ALVCH162374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP (Texas Instruments)
