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SN74ALVCH16901 18-BIT UNIVERSAL BUS TRANSCEIVER

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Description

SN74ALVCH16901 18ĆBIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCES010F * JULY 1995 * REVISED SEPTEMBER 2004 D Membe.
ordering information This 18-bit (dual-octal) noninverting registered transceiver is designed for 1.

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Features

* independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable (CLKENAB or CLKENBA) inputs. It also provides parity-enable (SEL) and parity-select (ODD/EVEN) inputs and separate error-signal (ERRA or ERRB) outputs for checking parity. The direction of data flow is contr

Applications

* of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus and UBT are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standa

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