Datasheet4U Logo Datasheet4U.com

SN74LV125A Quadruple Bus Buffer Gates

SN74LV125A Description

SN74LV125A SCES124O * DECEMBER 1997 * REVISED MAY 2022 SN74LV125A Quadruple Bus Buffer Gates With 3-State Outputs 1 .
The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.

SN74LV125A Features

* 2-V to 5.5-V VCC Operation
* Max tpd of 6 ns at 5 V
* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
* Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
* Support Mixed-Mode Voltage Operation on All Ports

SN74LV125A Applications

* Flow Meters
* Solid State Drives (SSDs): Enterprise
* Power Over Ethernet (PoE)
* Programmable Logic Controllers
* Motor Drives and Controls

📥 Download Datasheet

Preview of SN74LV125A PDF
datasheet Preview Page 2 datasheet Preview Page 3

📁 Related Datasheet

  • SN74LVC1G125 - high performance non-inverting buffer (UMW)
  • SN74LVC1G34 - Single buffer (UMW)
  • SN74L71 - AND-Gate R-S Master-Slave F-F (National Semiconductor)
  • SN74L74N - Dual D-Type Flip-Flop (ETC)
  • SN74LS00 - QUAD 2-INPUT NAND GATE (Motorola)
  • SN74LS02 - QUAD 2-INPUT NOR GATE (Motorola)
  • SN74LS04 - Hex Inverter (ON Semiconductor)
  • SN74LS04D - Hex Inverter (ON Semiconductor)

📌 All Tags

Texas Instruments SN74LV125A-like datasheet