SN74SSQE32882 Datasheet, Buffer, Texas Instruments

SN74SSQE32882 Features

• Buffer 1
• 2 JEDEC SSTE32882 Compliant
• 1-to-2 Register Outputs and 1-to-4 Clock Pair Outputs Support Stacked DDR3 DIMMs
• Chip Select Inputs Prevent Data Outputs from

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Part number:

SN74SSQE32882

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Texas Instruments ↗

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831.58kb

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📄 Datasheet

Description:

28-bit to 56-bit registered buffer. ORDERING INFORMATION This JEDEC SSTE32882-compliant, 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity is d

SN74SSQE32882 Application

• Applications
• DDR3 Registered DIMMs up to DDR3-1333
• Single-, Dual- and Quad-Rank RDIMM DESCRIPTION/ORDERING INFORMATION This JEDE

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SN74SSQE32882

Texas Instruments

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