Datasheet Details
Part number:
SN74SSQEA32882
Manufacturer:
File Size:
745.48 KB
Description:
28-bit to 56-bit registered buffer.
Datasheet Details
Part number:
SN74SSQEA32882
Manufacturer:
File Size:
745.48 KB
Description:
28-bit to 56-bit registered buffer.
SN74SSQEA32882, 28-Bit to 56-Bit Registered Buffer
This JEDEC SSTE32882-compliant, 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity is designed for operation on DDR3 registered DIMMs with VDD of 1.5 V and on DDR3L registered DIMMs with VDD of 1.35 V.
All inputs are 1.5 V and 1.35 V CMOS compatible.
All outputs are CMOS dri
SN74SSQEA32882 Features
* 1
* JEDEC SSTE32882 Compliant
* 1-to-2 Register Outputs and 1-to-4 Clock Pair Outputs Support Stacked DDR3 RDIMMs
* CKE Powerdown Mode for Optimized System Power Consumption
* 1.5V/1.35V Phase Lock Loop Clock Driver for Buffering One Differential Clock Pair (CK and CK
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