74AHC257-Q100 - Quad 2-input multiplexer
The 74AHC257-Q100; 74AHCT257-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7-A.
The 74AHC257-Q100; 74AHCT257-Q100 has four identical 2-input multiplexers with 3-state outputs.
They select 4 bi
74AHC257-Q100 Features
* Automotive product qualification in accordance with AEC-Q100 (Grade 1)
* Specified from 40 C to +85 C and from 40 C to +125 C
* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Non-inverting data path
* Inputs accept voltages higher than VCC