74AHC574PW Datasheet - nexperia

Octal D-type flip-flop

74AHC574PW Features

* I Balanced propagation delays I All inputs have a Schmitt-trigger action I 3-state non-inverting outputs for bus orientated applications I 8-bit positive, edge-triggered register I Independent register and 3-state buffer operation I Common 3-state output enable input I For 74AHC574 only: operates wi

74AHC574PW General Description

The 74AHC574; 74AHCT574 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are speciﬁed in compliance with JEDEC standard no. 7A. The 74AHC574; 74AHCT574 are octal D-type ﬂip-ﬂops featuring separate D-type inputs for each ﬂip-ﬂop and 3-state outputs .

74AHC574PW Datasheet (631.66 KB)

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74AHC574PW

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nexperia ↗

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631.66 KB

Description:

Octal d-type flip-flop.
74AHC574; 74AHCT574 Octal D-type ﬂip-ﬂop; positive edge-trigger; 3-state Rev. 02 24 January 2008 Product data sheet 1. General descripti.

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74AHC574PW Octal D-type flip-flop nexperia

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74AHC574PW Features

74AHC574PW General Description

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