Datasheet Details
Part number:
74AHCT138PW, 74AHC138
Manufacturer:
File Size:
256.07 KB
Description:
3-to-8 line decoder/demultiplexer.
Note:
This datasheet PDF includes multiple part numbers: 74AHCT138PW, 74AHC138.
Please refer to the document for exact specifications by model.
74AHCT138PW, 74AHC138, 3-to-8 line decoder/demultiplexer
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
7A.
The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer.
It accepts three binary weighted address inputs (A0, A1
74AHCT138PW Features
* Balanced propagation delays
* All inputs have Schmitt-trigger action
* Demultiplexing capability
* Multiple input enable for easy expansion
* Ideal for memory chip select decoding
* Inputs accepts voltages higher than VCC
* For 74AHC138 only:
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