Description
74HC4024 7-stage binary ripple counter Rev.10 * 23 November 2018 Product data sheet 1.General .
The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and seven fully buffered p.
Features
* Low-power dissipation
* Complies with JEDEC standard no. 7A
* CMOS input levels
* ESD protection:
* HBM JESD22-A114F exceeds 2 000 V
* MM JESD22-A115-A exceeds 200 V.
* Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Applicati
Applications
* Frequency dividing circuits
