74HC4024 Datasheet - Philips

74HC4024 7-stage binary ripple counter

The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is speciﬁed in compliance with JEDEC standard no. 7A. The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and.

74HC4024 Features

* s Low-power dissipation s Complies with JEDEC standard no. 7A s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Speciﬁed from

* 40 °C to +80 °C and from

* 40 °C to +125 °C. 3. Applications s Frequency dividing ci

74HC4024_PhilipsSemiconductors.pdf