HEF4040B-Q100 Datasheet (nexperia) - 12-stage binary ripple counter

HEF4040B-Q100, 12-stage binary ripple counter

The HEF4040B-Q100 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11).

The counter advances on the HIGH-to-LOW transition of CP.

A HIGH on MR clears all counter stages and forces all outputs LOW

HEF4040B-Q100 Features

* Automotive product qualification in accordance with AEC-Q100 (Grade 3)

* Specified from 40 C to +85 C

* Tolerant of slow clock rise and fall time

* Fully static operation

* 5 V, 10 V, and 15 V parametric ratings

* Standardized symmetrical output characteristics

* ESD